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Emphasize: Improve quality by increased functional completeness
-hides platform specific details -the same application can use different implementations of the same device
-hides platform specific details -the same application can use different implementations of the same device
Note that not only physical / tangingle things can be domain concepts… abstract situations can also be part of the domain (problem)
Substantial effort to write Domain-specific concepts not explicit: solving problem in technological space vs. problem space Hard to communicate with MTD engineers, … --- The idea is that a SW developer can focus on developing the control SW and use the generated simulator to test his work.
Instance – part of one particular machine configuration Variant – Captures Commonality / Planned Variants Feature - Abstract Domain Concepts
There are more but these were the ones that we experienced
Applying Software Product Line Engineering Techniques to Develop Simulators for Early System Integration Istvan Nagy Loek Cleophas ASML TU/e ASML Veldhoven 2011/09/29
Slide 2 | Introduction One of the world’s leading manufacturers of chip-making equipment Makes the scanners that print the chips 7697 employees (expressed in FTE, Q2 2011) Net sales in million EUR 1,529 (Q2 2011) R&D investment in million EUR 145 (Q2 2011) Number of systems shipped 63 (Q2 2011) ASML Source: ASML Q2 2011
Moore’s Law Moore’s Law drives the semi conductor industry ASML makes Moore’s law happen by developing the scanners that allow chip manufactures to shrink their device features. At the same time the cost of devices is brought down by increasing the scanner productivity Slide 3 |
Software Introduction ASML’s scanners - lithographic systems - are complex machines in which software plays an important role 35 million lines of code Mostly C, some Java, Python , and C++ About 7 DSLs.- increased focus on Model Driven Engineering > 15 years development history Distributed, heterogeneous, concurrent system > 20 nodes, > 200 processes Deployed onto SUN and 7 VME racks with power PCs (VxWorks or LINUX) Slide 4 |
Slide 5 | Early Testing & Integration Software tested on range from real machine to SW simulators Objectives: Shorten lifecycle of functional testing and qualification Optimize costs (development effort) in relation to qualification effort Functional completeness Proto Availability Test Rig Test Bench DevBench simulation based expensive inexpensive real robots, mirrors,…
Slide 6 | Software in a Loop Simulation
Finding the level of testability / simulation interface Software effort vs. coverage? coverage effort Slide 7 |
Finding the level of testability / simulation interface Software effort vs. coverage? takeOff land ascend (altitude) descend (…) flyTo(…) getAltitude Hardware Abstraction Layer (HAL) hides platform specific details coverage effort Slide 8 |
Machine Types & Platforms – Balancing Between Evolution and Revolution ASML develops 1-3 new machine types per year Platform: hardware foundation for range of machine types. Platform determines maximum capabilities of member machine types Development of new platform implies major changes of subsystems: “Revolution” Example: EUV technology - projection in vacuum with mirrors i.s.o. lenses Machines types built on same platform have moderate changes in subsystems: “Evolution” Slide 9 |
Slide 10 | TWINSCAN Platforms and Machine Types common and unique HW (& SW) modules to maintain material (wafer) flow How to create wafer-flow simulators efficiently for this product family?
How to Build a Wafer Flow Simulator? Slide 11 | ? Actuators Sensors Holders Operator Transportable Material Interactions …try to re-create a virtual replica of the real world… … common and unique simulation (“virtual”) modules to maintain material (wafer) flow
How to Build a Wafer Flow Simulator? – Error Scenarios Slide 12 | ? …however, the real world usually does not “behave” perfectly… Error-injection Scenarios in Simulation Transfer without wafer displacement Transfer with wafer displacement
Need to Raise Abstraction Level Slide 13 | template<typename T, typename F> void CLightBeamSensor::movingWaferIntersectionCheck( const Gm::CartVector & cartVector, const CWafer *wafer, Sim_FSM *FSM ) { bool intersects; Gm::CartPoint point; Gm::addCartPoints(cartVector.two, wafer->getRelPos(), point); … Gm::circleIntersectsVerticalVector(circle, this->getVerVector(), intersects); if( intersects ) { FSM->process_event(T()); } … } Model wafer flow simulators of different systems with common and unique features Template programming in C++ Vector Geometry Error-handling Statecharts Complex modeling and programming in solution (technology) space Simplified modeling and programming in problem space automated production mechanism
Slide 14 | Model-Driven Engineering Approach Wafer Flow config. with static variation points
Features, Variants and Binding Times (Examples) Slide 15 | Abstract - Concrete
Slide 16 | VPDSL – A DSL for Specifying and Generating Wafer Flow Simulators Closely resembles the final system – unlike C/C++
Interactions for Material Transfer in VPDSL Slide 17 | Fixed Transfer Area Moving Transfer Area
Slide 18 | Design Workflow with VPDSL Specify VPDSL model Generate simulation code Integrate simulation code with control software Eclipse-based Xtext DSL editor Eclipse-based Xtend/Xpand DSL to C++ Technologies in target code: Boost state machines Geometry library ASML sw. facilities mechanical engineer software engineer
Slide 19 | Runtime Workflow Initialize control software with simulator Initialize injector Read injector configuration file Wait for event from control software Check fault rules Inject error Robot1 actuated to {r1,phi1,z1} if(evCheckError) [yes] [no] if(satisfied) [yes] [no]
Use for Progression Testing Slide 20 | New control SW functionality was developed to have robot correctly center slightly displaced wafer while transferring it to load lock Integration with control SW showed bug in this new functionality Would have turned up during test on proto machine Saved costly testing time on machine Control SW detects eccentric wafer, uses robot to correct
Experiences and Lessons Learnt Many physical modules required for maintaining wafer flow have evolved over more than 10 years → stable base for domain analysis DSL acts bridge between different disciplines: non-software engineers implement the simulation models → code generator transforms these models into C++ code utilized by software engineers DSL has simple, intuitive textual syntax → easier for users and for version control DSL evolves due to incremental approach → qualification (test) suite on code generator is essential Slide 21 |
Domain Specific Languages and Software Product Line Engineering DSL and its environment provides reuse on higher abstraction level than code. The language expresses configurations of products directly as they are built makes communication easy for different stakeholders (speaking “the ubiquitous language” of the product) hides (complex) implementation details acts as contract between different teams/disciplines (e.g. one discipline defines the models, the other uses the generated artifacts from the models) enables automation and enforcement of architectural constraints For other benefits, see: Bruce Task et. al., Using model-driven engineering to complement software product line engineering in developing software defined radio components and applications, ACM, US, New York, NY, USA, 2006
Conclusions New (generated) simulators provide more realistic simulation than old ones due to ‘standardized’ interactions → we found new SW bugs already in development phase Modeling of error injection scenarios at domain level provides cheap way to increase coverage / robustness of SW to reproduce error situations from the field The DSL can be applied to forthcoming machine types of the NXT and NXE platforms Slide 23 |
Questions? Slide 24 |
Summary: This talk is on applying domain-specific modeling and software product line engineering (SPLE) techniques to develop software-in-the-loop simulators (SILS) for early testing and hardware-software integration. We present an overview of a domain-specific modeling language for the modeling of hardware configurations combined with material flow (in particular, wafer flow) in manufacturing (lithography) systems. As an automated production mechanism, we use a code generator that generates the final source code of the executable simulators from the models. This talk has been presented at the High-Tech Product Lines conference in 2011.
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