Design Expertise Digital Signal Processing Networking Test & Measurement Bus Interfaces & Protocols Digital Video and Imaging Telecom Automotive Medical Military Datacom Satcom

Nu Horizons Virtex 5 Reference Board Nu Horizons Virtex-5 Reference Board XC5VFX30T FPGA •1 SFP Module Port 2 sets of SMA ports for off-board GTX transceiver connectivity External Differential Clock to drive GTXs Single Ended General Purpose External Clock Dedicated MGT loopback path for easily design verification IDT ICS843001 Femtoclock Frequency Synthesizer for GTXs •Marvell 88E1119 Gigabit PHY •24-bit Analog Devices high-speed Video DAC •64 Mbytes of Micron DDR SDRAM •16 Gb of Micron High Speed NAND Flash

PCIe Switch - External PCIe switch - 8 lane upstream port - 8 lane down stream port - 4x4 lane downstream port Design Examples Floating Point Co-Processor Board FPGA based PCIe to 8 DSP switch 4 Lane PCIe FPGA based DDR buffereing For PCIe I/F For DSP I/F

Design Examples Airborne Location Transponder Marvell PXA320 "Monahans P" processor, 800MHz 128MB of NAND flash memory 128MB of mobile DDR memory Removable SD card Ublox TIM-4H GPS module integrated onto the PCB Aerocomm AC4790-1000M RF transceiver ARINC Processor Card AMCC PPC 405 core Coprocessor RAM (DDR) with ECC 2 Mb x 32 bit + ECC Flash 11 - ARINC 429 Tx/Rx Channels – Based on Actel FPGA 1 – ARINC 717 Rx Channel - Based on Actel FPGA Custom Channel Processing on FPGA PPC PCI Bus Interface – PC104 Bus. 2 – UARTs, one RS-232 and the other RS-422/485, Discrete I/O, 12 inputs, 4 outputs 2 Ethernet ports (optional)

Design Examples Video Processing FPGA Frame rate conversion from 15fps to 29.97fps 2X horizontal and vertical scaler 400 x 240 input resolution 800 x 480 output resolution False color generation On screen display, battery icon, splash icon Dual Port DDR image buffer PMC Card Xilinx Virtex-4FX FPGA, PCI/PCI-X interface, configuration FLASH, control PLD Two independent banks of DDR2 SDRAM, Stratum 3 timing generator Four SFP ports Embedded PPC

Design Examples Stereo Video Processor Development Board ASIC Verification in FPGA One component YPbPr input + Video Decoder Two component YPbPr output and Video Encoder MDIN3 for the SYNC signal 2 x 16 Mb SDRAM Mcrocontroller with an RS232 to UUT. HDTV Video Processor Multiple Video Formats Utilizing PCI Core Multi-PCI bus switch Multi Video Cahannel swirch Interface SDRAM @133MHz, Transitioning Next Gen. to PCIe

Design Examples FPGA DSP Application MPEG 4 Pre-compensation Processor Non-linear Edge Adaptive Spatial Filter Polyphase decimation for image cropping and scaling Luminance Enhancement, adjustable LPF/HPF emphasis Multi Channel to PCI Interface Boards 24 RS-232/RS-422 Channels 24 16C954 UARTS PCI 32bit interface Implemented in an Actel FPGA

Design Examples Module Design/System on Module Replace obsolete ASSP/ASIC Use FPGA and adapter board Obsolete Motorola UART for phone systems Footprint adapter boards Obsolete ASIC to FPGA Conversion Original ASIC a custom implementation 2 Cirrus CD1400 (4 ch UART) plus custom Interface and logic had to be H/W and S/W compatible Used Altera Stratix FPGA to implement

NorthBridge Technology Contact information www.northbridgetech.com Or call at: +1 613 228 6776 x111 NorthBridge Technology 2660 Southvale Cres., Suite 325 Ottawa, ON, K1B 4W5 Canada